One of the many aspects to consider when fabricating an implantable sensor is minimizing the foreign body reaction to the implantable sensor. In particular, an aim would be minimizing the complexity of the process for implanting the sensor and the resultant damage which may occur during the implantation.
High surface area electrodes with very small geometrical areas can help achieve the above goal while retaining sensitivity for sensing applications. Additionally, the use of the high surface area electrodes can also decrease the system cost, for example, when used with existing CMOS (complementary metal-oxide-semiconductor) technology.
Micro-scale and nano-scale structuring of electrodes have been used in sensing and energy storage. Such structuring of electrodes can also provide advantages in terms of high output signal and enhanced selectivity using different sensing techniques.
The most common fabrication methods for making such high surface area electrodes include direct Physical Vapor Deposition (PVD) or Chemical Vapor Deposition (CVD) for the electrode materials. However, the resulting structures for the electrodes fabricated using either PVD or CVD are not suitable for long-term use. For example, such electrodes can experience deformation in when subjected to liquid environments because of existing capillary forces in the environments.
Alternative bottom-up fabrication techniques which could be used to make high surface area electrodes include vapor-liquid-solid (VLS) growth, porous templates or complex electrochemical plating. Although the devices fabricated using bottom-up fabrication techniques function better in liquids than the electrodes fabricated using PVD or CVD, there are a number of different complications which arise. First, VLS uses high temperatures, high pressures and phase transitions which cannot be easily controlled. Additionally, porous templates require fabrication of porous templates and filing templates. Furthermore, electrochemical plating requires the use of liquids. In view of such requirements, these bottom-up fabrication techniques may not be compatible with current CMOS processes or other standard fabrication processes used in making implantable systems. Therefore, these bottom-up fabrication techniques can be pretty complex, expensive and difficult to replicate.